Intel Off Campus Drive for Physical Design Timing Engineer in Bangalore

Intel is hiring for the post of Physical Design Timing Engineer in Bangalore. Candidates who are looking for this opportunity can apply for this position before the last of the application. Check eligibility details and application process given below.

Company Name: Intel

Job Location: Bangalore

Job Role: Physical Design Timing Engineer

Experience: Freshers

Employment Type: Full Time

Selection Type: Online

Educational Qualifications: Any Graduate

Join our Telegram for more IT job updates - Click Here

Job Description:

• Performs timing analysis and timing optimization, generates, and verifies timing constraints, and fixes timing violations at chip/block level for SoCs.
• Conducts timing rollups, designs for functionality, and develops performance and power optimized clock networks.
• Develops and defines methodologies to ensure highest quality of timing models that enable the physical design team to operate efficiently.
• Defines the right process, voltage, and temperature (PVT) conditions to be used for timing analysis for a given design based on the product plans such as operating conditions and binning.
• Works closely with the clocking team and other backend full chip designers for clocking balance, timing fixes, power delivery, and partitioning.
• Collaborates with architecture, clocking design, and logic design teams to deliver flow development for chip integration and validates high performance low power clock network guidelines.

How To Apply:

• Visit the official website/ click on given link below
• Fill all the application details
• Upload the updated Resume

Application Link: APPLY NOW